XCENA Unveils MX1 Computational Memory with RISC-V Cores, CXL 3.2, and SSD Tiering
At the Future of Memory and Storage (FMS) 2025 event, South Korean startup XCENA unveiled its groundbreaking MX1 Computational Memory. This innovative product integrates thousands of RISC-V cores, enabling near-data processing that significantly reduces the overhead associated with traditional CPU-memory interactions. The MX1 is designed to support petabyte-scale SSD-backed expansion and is set to pave the way for future server architectures. XCENA’s roadmap includes the release of the MX1P later this year and the MX1S in 2026, both of which will utilize the advanced CXL 3.2 standard.
Revolutionizing Data Processing
The MX1 Computational Memory is built on the PCIe Gen6 and Compute Express Link 3.2 standards. By positioning computational capabilities directly next to DRAM, the MX1 minimizes the need for data to travel back and forth between processors and memory. This approach, known as near-data processing, is expected to reshape server design in the coming years. The integration of thousands of RISC-V cores allows the MX1 to efficiently manage complex workloads, including vector database operations and memory-intensive queries.
XCENA’s innovative design not only enhances processing speed but also introduces SSD-backed memory expansion, which can support capacities reaching petabytes. This expansion is complemented by features that improve data compression and reliability, making the MX1 a robust solution for modern data demands.
Product Launch and Future Plans
XCENA plans to release two models of the MX1. The MX1P is anticipated to be available later this year, with working samples set to be shared with select partners starting in October. The MX1S, which will feature dual PCIe Gen6 x8 links and additional enhancements, is scheduled for launch in 2026. Both models will leverage the broader bandwidth and flexibility provided by the CXL 3.2 standard, ensuring they meet the evolving needs of data-intensive applications.
The MX1 has already garnered recognition, winning the “Most Innovative Memory Technology” award at FMS 2025. This accolade marks XCENA’s second consecutive award at the event, following its recognition as the “Most Innovative Startup” in 2024. Jay Kramer, Chair of the Awards Program, highlighted the significance of computational memory in enhancing performance and efficiency for data-heavy tasks.
Developer Support and Ecosystem
To encourage adoption of the MX1, XCENA is providing a comprehensive software development kit (SDK). This SDK includes essential drivers, runtime libraries, and tools designed to facilitate the integration of the MX1 into various applications. Developers can utilize this toolkit to evaluate and deploy the MX1 for tasks ranging from AI inference to in-memory analytics.
By offering a standard-compliant stack, XCENA aims to simplify the development process, allowing users to seamlessly incorporate the MX1 into their existing environments. This initiative reflects XCENA’s commitment to fostering a robust ecosystem around its innovative computational memory technology, positioning it as a key player in the future of memory and storage solutions.
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